Optoelectronic receiver circuit for digital communication

ABSTRACT

In an optoelectronic interface for digital communication the slopes of the rising edges and falling edges of a digital signal are decreased making use of an RC-combination. The amount of Emi generated is thereby decreased.

The invention relates to an interface for digital communication comprising

-   -   signal terminals for connection to a source supplying a bus         voltage,     -   a switching element coupled between the signal terminals,     -   a control circuit for controlling the conductive state of the         switching element comprising         -   supply voltage terminals,         -   means for generating a supply voltage between the supply             voltage terminals,         -   a series arrangement comprising a light sensor for receiving             digital light signals and an impedance coupled between the             supply voltage terminals,         -   an out put terminal coupled to the series arrangement and to             a control electrode of the switching element.

Such an interface is known from a digital interface system that is known as Digital Addressable Lighting Interface (DALI). In the known interface the switching element and the control circuit are used to send signals from a slave to a master. The slave is equipped with a light emitting diode that transmits light signals. These light signals are sensed by a light sensor that forms an opto-isolator output stage and together with the light emitting diode forms an optocoupler. The optocoupler functions as an opto-isolator. When it senses light, the light sensor becomes conductive and a current flows through the series arrangement comprised in the control circuit, so that a voltage is present over the impedance that is part of the series arrangement. In the known interface this impedance is an ohmic resistor. When it senses no light, the light sensor becomes non-conductive, so that the current through the series arrangement and the voltage over the impedance both drop to zero. In the known interface the voltage over the impedance is also present at the control electrode of the switching element. As a result the switching element is rendered conductive when the light sensor is conductive so that the switching element forms a short circuit between the signal terminals. The source that supplies the bus voltage is so constructed that it can only maintain the bus voltage between the signal terminals when the current through the signal terminals is below a predetermined value. Because of the short circuit the current through the signal terminals is in fact higher than the predetermined value, causing the voltage between the signal terminals to become substantially equal to zero. When the light sensor is non-conductive, the switching element is also rendered non-conductive so that the voltage between the signal terminals equals the bus voltage.

The known interface suffers several serious drawbacks. First of all the DALI standard requires that the rising and falling edge of a DALI signal must be longer than 10 microseconds (to reduce EMI) but must not exceed 100 microseconds. In other words, in case of a typical bus voltage of 16 Volt the slope of the rising and falling edge of the signal, that is generated by the switching element and is present between the signal terminals, may not exceed 1.6 MV/sec. Practical embodiments of the known interface only meet this requirement in case of a heavy capacitive load, but not in most practical circumstances.

The invention aims to provide a simple interface for digital communication that causes a relatively low amount of EMI.

An interface as mentioned in the opening paragraph is therefor in accordance with the invention characterized in that the interface is further equipped with a first circuit comprising a capacitor and coupled between the control electrode and a signal terminal and a second circuit comprising an ohmic resistor and coupled between the output terminal of the control circuit and the control electrode of the switching element.

It has been found that because of the presence of the first circuit and the second circuit in an interface according to the present invention, an interface according to the present invention causes only a relatively small amount of EMI.

Good results have been obtained for embodiments of an interface according to the present invention in which the impedance comprised in the control circuit comprises an ohmic resistor.

Apart from rising and falling edges in the signal, that is present between the signal terminals and is generated by the switching element, that are too steep, the known interface also suffers from another drawback, being the fact that the time delay of the rising edge when the switching element is switched off differs substantially from the time delay of the falling edge when the switching element is switched on. This difference causes a disturbance of the “high/low-ratio” of the signal generated by the switching element. Since the DALI standard requires that the “high/low-ratio” is approximately equal to 1, a disturbance of this ratio can lead to misinterpretation of the signal by the receiving master. To overcome the difference in the time delays of a rising and a falling edge respectively, the impedance comprised in the control circuit preferably comprises a parallel arrangement of an ohmic resistor and a zener diode. It has been found that the difference in the time delays can be minimized in case the zener voltage Vz of the zener diode is chosen such that 1.6*Vt<Vz<2.4*Vt, preferably such that 1.8*Vt<Vz<2.2*Vt, wherein Vt is the threshold voltage of the switching element.

In a preferred embodiment of an interface according to the invention, the means for generating a supply voltage comprise unidirectional means and buffer capacitor means. Thus the means for generating a supply voltage are realized in a very simple and dependable way.

An embodiment of an interface according to the invention will be explained making reference to a drawing. In the drawing

FIG. 1 shows an embodiment of an interface according to the invention.

In FIG. 1, K1 and K2 are signal terminals between which a bus voltage is present during operation. Signal terminals K1 and K2 are connected by means of a switching element T1. Switching element T1 is shunted by a series arrangement of diode D1 and capacitor C2. In this embodiment diode D1 forms unidirectional means and capacitor C2 forms buffer capacitor means. Diode D1 and capacitor C2 together form means for generating a supply voltage. A first side of capacitor C2 is connected to supply voltage terminal K3. A second side of capacitor C2 is connected to supply voltage terminal K4. Capacitor C2 is shunted by a series arrangement of light sensor T2 and ohmic resistor R3. Ohmic resistor R3 is shunted by zener diode D2. The zener voltage of the zener diode is chosen substantially equal to twice the threshold voltage of switching element T1. A common terminal of ohmic resistor R3, zener diode D2 and light sensor T2 forms an output terminal K5. Supply voltage terminals K3 and K4, diode D1 and capacitor C2, light sensor T2, ohmic resistor R3, zener diode D2 and output terminal K5 together form a control circuit for controlling the conductive state of the switching element T1. The parallel arrangement of ohmic resistor R3 and zener diode D2 forms an impedance comprised in the control circuit. Output terminal K5 is connected to a control electrode of switching element T1 by means of ohmic resistor R1. In this embodiment ohmic resistor R1 forms a second circuit coupled between output terminal of the control circuit and the control electrode of the switching element T1. The control electrode of switching element T1 is connected to signal terminal K1 by means of capacitor C1. In this embodiment capacitor C1 forms a first circuit coupled between the control electrode and a signal terminal.

The operation of the interface shown in FIG. 1 is as follows.

When the signal terminals K1 and K2 are connected to a source supplying a bus voltage, the bus voltage that is present between the signal terminals, when the interface is in use, charges capacitor C2 to a voltage that is substantially equal to the bus voltage. When the interface shown in FIG. 1 is connected to a slave that is equipped with a light emitting diode that transmits light signals, these light signals render the light sensor T2 that is comprised in the control circuit alternately conductive and non-conductive. When the light sensor T2 is conductive, the voltage over capacitor C2 causes a current to flow through the light sensor T2 and ohmic resistor R3. The voltage over ohmic resistor R3 renders the switching element T1 conductive. The switching element T1 becomes a short circuit causing the current supplied by the source for supplying the bus voltage to increase above a predetermined value. This predetermined value is the highest current that the source for supplying the bus voltage can supply while maintaining the bus voltage between the signal terminals. Since the actual current is higher than the predetermined value, the voltage between the signal terminals drops. The presence of C1 and R1 makes sure that switching element T1 does not immediately become conductive but only gradually. As a consequence the slope of this drop is decreased by the presence of ohmic resistor R1 and capacitor C1. During the conductiveness of the light sensor T2, capacitor C1 is charged by a current flowing through the light sensor T2, ohmic resistor R1 and capacitor C1. Similarly, when the light sensor is non-conductive, the voltage over ohmic resistor R3 drops to zero, so that the switching element T1 is rendered non-conductive and the voltage between the signal terminals increases. The steepness of the slope of this latter increase is again limited by the presence of ohmic resistor R1 and capacitor C1, since switching element T1 is not rendered non-conductive immediately but gradually. During the non-conductiveness of the light sensor T2, capacitor C1 is discharged by a current that flows from signal terminal K1 through capacitor C1, ohmic resistors R1 and R3 to signal terminal K2. By choosing the zener voltage approximately equal to twice the threshold voltage of the switching element T1 and by choosing ohmic resistor R3 relatively small (with respect to ohmic resistor R1), the current that charges capacitor C1 is approximately equal to the current that discharges C1. As a consequence the time delay of the rising edge of the signal present between the signal terminals is approximately equal to the time delay of the falling edge of that signal. This in turn causes the disturbance of the “high/low-ratio” of the signal present between the signal terminals to be very small.

An experiment has been conducted in which two interfaces were used. The first interface was a practical embodiment of the interface shown in FIG. 1 while the second interface did not comprise the capacitor C1, the ohmic resistor R1 and the zener diode D2 but was otherwise identical to the first interface. The steepness of the slopes of the signal present between the signal terminals of each of the interfaces was evaluated for the same signal transmitted by the same light emitting diode and a bus voltage of 16 V. For the second interface it was found that the slope of the rising edge was 28 MV/sec while the time delay was 8.5 microseconds and the slope of the falling edge was 17 MV/sec while the time delay was 3.5 microseconds. For the first interface it was found that the slope of the rising edge was 1.1 MV/sec while the time delay was 28 microseconds and the slope of the falling edge was 0.5 MV/sec and a delay of 38 microseconds. It can be concluded that the slopes of the rising and falling edges of the signal meet the DALI requirements in case of the first interface but not in case of the second. Additionally the time delays of the rising edge and the falling edge of the signal are more similar in case of the first interface than in case of the second interface. As a consequence the “high/low-ratio” of the signal present between the signal terminals is very close to 1. 

1. Interface for digital communication comprising signal terminals for connection to a source supplying a bus voltage, a switching element coupled between the signal terminals, a control circuit for controlling the conductive state of the switching element comprising supply voltage terminals, means for generating a supply voltage between the supply voltage terminals, a series arrangement comprising a light sensor for receiving digital light signals and an impedance coupled between the supply voltage terminals, an out put terminal coupled to the series arrangement and to a control electrode of the switching element, characterized in that the interface is further equipped with a first circuit comprising a capacitor and coupled between the control electrode and a signal terminal and a second circuit comprising an ohmic resistor and coupled between the output terminal of the control circuit and the control electrode of the switching element.
 2. Interface according to claim 1, in which the impedance comprised in the control circuit comprises an ohmic resistor.
 3. Interface according to claim 1, wherein the impedance comprised in the control circuit comprises a parallel arrangement of an ohmic resistor and a zener diode.
 4. Interface according to claim 3, wherein the zener voltage Vz of the zener diode is chosen such that 1.6*Vt<Vz<2.4*Vt, wherein Vt is the threshold voltage of the switching element.
 5. Interface according to claim 4, wherein the zener voltage Vz of the zener diode is chosen such that 1.8*Vt<Vz<2.2*Vt, wherein Vt is the threshold voltage of the switching element
 6. Interface according to claim 1, wherein the means for generating a supply voltage comprise unidirectional means and buffer capacitor means. 